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Introduction
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// Introduction



There are two primary methods for transforming and AND or OR expression into a NAND or NOR expression.
  1. Use boolean algebra to manipulate the equivalent expression using the gate type desired.
  2. Use gate equivalency rules to let any gate perform AND and OF functions

Algebraic Manipulation

NAND

The NAND gate is an AND gate with an inverter added to the output. For a given set of input states it will provide the opposite output state to an AND gate. It therefore provides low output level if all the inputs are high, but a high output level for any other combinations of inut states.

NAND form:
F=AB

The laws of boolean algebra allow you to convert a boolean expression into an equivalent boolean expression that is directly implementable in the gate type desired.


Original expression:
F=AB+CD
In implementing an expression using only NAND gates, the goal is to reduce all logical operations to the NAND form: AB.

Double bar and apply DeMorgan's theorem to make all operations in the AND form:
F=((AB')+(C'D)')'
Examining this expression, you should find 3 NAND expressions:
  1. (AB')'
  2. (C'D)'
  3. (XY) where X=(AB')' and Y=(C'D)'

NOR

Original expression:
F=AB+CD
NOR form:
F=A+B
In implementing an expression using only NOR gates, the goal is to reduce all logical operations to the form above.
F=((AB'+C'D)')'
F=((AB')'•(C'D)')'
F=((AB')')'+((C'D)')'
F=(A'+B)'+(C+D')'
The final logical operation between the first and second parts of the expression is the OR function. If a NOR gate is used to perform the OR operation, the final output of this NOR gate to properly generate F.


Gate Equivalencies

Boolean algebra is composed of just three operators; AND,OR, and NOT. ANy expression can be implemented using combinations of these three functions. To implement a circuit with just one gate type, all three of these operations must somehow be performed.

The NAND gate will perform the AND function if the output is inverted.
A NOR gate will perform the And function if the output is inverted.
Here is the AND form of a NAND gate:

Here is the OR form of a NAND gate:

Here is the AND form of a NOR gate:

Here is the OR form of a NOR gate:

To further define the meaning of the circles on the gate symbols, you say a gate form with a circle at the output has an active low output. A gate form with the circles at the inputs is said to have an active low inputs.

A gate form without a circle at the output has an active high output. A gate form without the circles at the inputs is said to have an active high inputs.

the AND form of the NAND gate can be thought of as an AND gate with active high inputs and an active low output.

the OR form of the NAND gate can be thought of as an OR gate with active low inputs and an active high output.





// Lab



Design and build an even parity generator for a 3 bit word.

Parity bits are extra signals which are added to a data word to enable error checking. There are two types of Parity - even and odd. An even parity generator will produce a logic 1 at its output if the data word contains an odd number of ones. If the data word contains an even number of ones then the output of the parity generator will be low. By concatenating the Parity bit to the dataword, a word will be formed which always has an even number of ones i.e. has even parity.

Parity is used on communication links (e.g. Modem lines) and is often included in memory systems. If a dataword is sent out with even parity, but has odd parity when it is received then the data has been corrupted and must be resent. As its name implies the operation of an Odd Parity generator is similar but it provides odd parity. The table shows the parity generator outputs for various 8-bit data words.
Dataword Even Odd
0000 0000 0 1
1000 0000 1 0
0001 0000 1 0
1110 1001 1 0
This circuit will have three inputs (the 3 bits of the word) and one output.

The output should be 1 if there is an odd number of 1s in the input word.
The output should be 0 if there is an even number of 1s in the input word.

  • Design a truth table defining the function described above
  • Provide an SOP equation for the truth table
  • Provide an POS equation for the truth table
  • Using an XOR gate draw a logic diagram
  • Here is how you could use NAND gates to replace an XOR gate

    Draw a logic diagram using only NAND gates


// Questions



triple_input_NAND.png
  1. Given the following boolean expression:
    F=ABC+ABC+ABC
    produce using algebraic manipulation:
    • An equivalent expression using only NAND operations
    • A logic diagram implementing the preceding equation using only NAND gates
    • An equivalent expression using only NOR operations
    • A logic diagram implementing the preceding equation using only NOR gates


  2. Repeat the above question for expression:
    F=A B C+ A BC+ ABC+ ABC+ ABC


  3. Implement a three-input AND gate using only two-input NAND gates. Use gate equivalency rules to design the logic diagram.

  4. Implement a three-input OR gate with NAND gates

  5. Using gate equivalency rules, implement the following expression using only NAND gates
    F=(A+B)•(CD+E)


  6. What is the advantage of using NAND logic over NOR logic to implement the function defined by the accompanying truth table using only NAND gates and inverters:
    A B C F
    0 0 0 0
    0 0 1 0
    0 1 0 1
    0 1 1 1
    1 0 0 0
    1 0 1 1
    1 1 0 0
    1 1 1 1




Source: Passafine, John and Michael Douglas, Digital Logic Design