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Pencilbox Intro
Exercise 1
Exercise 2
Exercise 3
Exercise 4
Troubleshooting
Exercise 1 solution

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The LD-1 Pencilbox® Logic Designer kit is an instrument which makes it easy to implement and test digital circuits. It can be used in the study and design of logic gates, counter, multiplexers, and flip-flops, and can even be used for simple microprocessor circuits.

The unit contains 8 LED indicators, 8 toggle switches, 2 debounced push-button switches, and a clock. The LEDs are sometimes call logic indicators, and can be used to display output signals from digital circuits that are built using the kit. They may also serve as independent logic probes for circuit testing. The toggle switches, also called logic switches, can be used to provide input signals to a digital circuit. The push-button switches, sometimes known as pulsers, provide logic pulses that are also used as input signals to a circuit. The pulse lasts as long as the button is depressed. The clock provides a square wave at approximately 1 kHz.

All of these functions are internally connected to a solderless interconnect socket with five tie points for each signal. In addition, a general-purpose socket (or breadboard) is provided as a convenient work area for circuitry being designed or studied. Both sockets allow insertion of components or wires up to size 20 AWG in diameter. Power is supplied to the kit by a wall transformer.

The unit is housed in a durable plastic case with a hinged cover. This makes it possible to partially implement a circuit and then store or transport the entire kit for later use or evaluation.

Exercise I



  1. Wire up ground and power.


  2. Insert a seven segment LED display


  3. Make the following connections with a 330K resistor:
    pin A-S0
    pin B-S1
    pin C-S2
    pin D-S3
    pin E-S4
    pin F-S5
    pin G-S6


  4. Connect the switches to the Logic Indicators (the LEDs in the pencilbox):

    pin S0-L0
    pin S1-L1
    pin S2-L2
    pin S3-L3
    pin S4-L4
    pin S5-L5
    pin S6-L6



  5. led.png


  6. Write the binary number associated with the digital representation of the decimal number on the 7-segment display.

    Example:
    To get a 1 displayed, the binary number (switches turned to High and Low) is 0000 0101




  7. D C B A Sa Sb Sc Sd Se Sf Sg
    0 0 0 0 1 1 1 1 1 1 0
    0 0 0 1 0 1 1 0 0 0 0
    0 0 1 0 1 1 0 1 1 0 1
    0 0 1 1 1 1 1 1 0 0 1
    0 1 0 0 0 1 1 0 0 1 1
    0 1 0 1 1 0 1 1 0 1 1
    0 1 1 0 0 0 1 1 1 1 1
    0 1 1 1 1 1 1 0 0 0 0
    1 0 0 0 1 1 1 1 1 1 1
    1 0 0 1 1 1 1 0 0 1 1

    A BCD (Binary Code) chip converts a binary number between 0 and 9 into a decimal number on the seven-segment LED display.
    Below is the truth table. With the boolean expression for Sa> and Se
    Sa=(D C B A) + (D C BA) + (D C BA)+ (D CB A)+ (D CBA)+ (DC B A) + (DC B A)

    Se=(D C B A) + (D C BA) + (D CBA) + (DC B A)

    Write the remaining 5 expressions.


Exercise 2-Logic Gates



Parts:

logic designer
7400 NAND Gate
7402 NOR Gate
7404 Inverter
7408 AND Gate
7432 OR Gate
7486 XOR Gate


Procedure

  1. Connect the following circuits and complete the truth tables:


















Exercise 3-GATE EQUIVALENTS



Objectives:

To verify that the five basic logic operations can be implemented by using just NAND gates or NOR gates.

Parts:

logic designer
7400 NAND Gate
7402 NOR Gate


Procedure

  1. Connect the 7400 circuits shown and identify each basic logic operation by the results of each truth table.
    _1nor.png

    _2nor.png

    _3nor.png

    _4nor.png
    _1nand.png

    _2nand.png

    _3nand.png

    _4nand.png

  2. Show how the XOR operation can be achieved using just NAND Gates.


  3. Show how the XOR operation can be achieved using just NOR Gates.



Exercise 4-COMBINATIONAL LOGIC NETWORKS



Objectives:

To compare the implementation of an unsimplified logic expression with that of the simplified logic expression.

2) To use Demorgan's Laws to arrange the logic expression for NAND Gate implementation.

Parts:

logic designer
2- 7410 Triple three input NAND gates
1- 7400 Quad two input NAND gate

The two basic types of digital networks care called Combinational and Sequential networks. In the combinational network, the output depends on the values of the inputs at a particular instant of time. In the sequential network, the output depends on the previous values of inputs as well as the present values.

In this experiment, a truth table provides the basic for writing the unsimplified logic expression in minterm form. Using Demorgan's Laws, this logic expression in written in a form for NAND gate implementation.

The logic expression can be simplified by using Boolean algebra postulates and identifies, or by using the Karnaugh Map.

Procedure

  1. The truth table of table 1 gives the desired logic function. Reading the function in minterm form gives

    Connect the logic diagram . Apply the inputs given by the truth table and verify the function values:





  2. Given the simplified equation:

    Connect the circuit in Fig. 2. Apply inputs and verify the truth table:

  3. Prove the simplification of

    by using the Karnaugh Map


  4. Show how the simplification could be constructed by using only NOR Gate